• DocumentCode
    1100352
  • Title

    A source coupled FET logic—A new current-mode approach to GaAs logics

  • Author

    Katsu, Shinichi ; Nambu, Shutaro ; Shimano, Akio ; Kano, Gota

  • Author_Institution
    Matsushita Electronics Corporation, Osaka, Japan
  • Volume
    32
  • Issue
    6
  • fYear
    1985
  • fDate
    6/1/1985 12:00:00 AM
  • Firstpage
    1114
  • Lastpage
    1118
  • Abstract
    This paper describes the basic properties of the source coupled FET logic (SCFL) in terms of the dc characteristics, the speed and power performance, and other inherent features. Simulation results are compared to those for the direct coupled FET logic (DCFL), demonstrating that the SCFL has a wide allowable threshold voltage range, an excellent fan-out capability, a small input capacitance, a high input sensitivity, and a versatility for the application.
  • Keywords
    Capacitance; Differential amplifiers; Equations; FET integrated circuits; Gallium arsenide; Inverters; Logic; Semiconductor diodes; Threshold voltage; Virtual reality;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1985.22082
  • Filename
    1484828
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1100352