Title :
A single CMOS speech synthesis chip and new synthesis techniques
Author :
Inoue, Kazuo ; Wakabayashi, Kenji ; Yoshikawa, Yoshinobu ; Masuzawa, Shigeaki ; Sano, Kenji ; Kimura, Seiji
Author_Institution :
Sharp Corporation, Tenri City, Nara, Japan
fDate :
2/1/1983 12:00:00 AM
Abstract :
A single CMOS speech synthesis LSI, organized as a special purpose microcomputer containing program ROM, RAM, 32K of speech data ROM, and a D/A converter is described in this paper. The chip utilizes new speech synthesis techniques to generate high quality speech, reproducing the natural inflection and intonation of the speaker, and has been used to produce speech at a bit rate of about 3 kbits/s.
Keywords :
Circuits; Data compression; Large scale integration; Linear predictive coding; Microcomputers; Read only memory; Read-write memory; Signal processing algorithms; Signal synthesis; Speech synthesis;
Journal_Title :
Acoustics, Speech and Signal Processing, IEEE Transactions on
DOI :
10.1109/TASSP.1983.1164053