Title :
Computer Reduction of Two-Level, Multiple-Output Switching Circuits
Author :
Su, Yueh-hsung ; Dietmeyer, Donald L.
Author_Institution :
IEEE
Abstract :
An algorithm which reduces the number of gates and connections (diodes) in two-level, multiple-output combinational logic networks is presented and compared with conventional minimization procedures.
Keywords :
Algorithm, combinational logic synthesis, logic design automation, multiple-output switching functions, reduction of two-level logic.; Circuit synthesis; Combinational circuits; Costs; Design automation; Diodes; Input variables; Logic design; Minimization methods; Network synthesis; Switching circuits; Algorithm, combinational logic synthesis, logic design automation, multiple-output switching functions, reduction of two-level logic.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1969.222525
