DocumentCode :
1100917
Title :
A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits
Author :
You, Chao ; Guo, Jong-Ru ; Kraft, Russell P. ; Chu, Michael ; Goda, Bryan ; McDonald, John F.
Author_Institution :
North Dakota State Univ., Fargo
Volume :
15
Issue :
9
fYear :
2007
Firstpage :
1051
Lastpage :
1054
Abstract :
A 7-12-Gb/s demultiplexer implemented with circuits for a high-speed field-programmable gate array (FPGA) is introduced in this paper. Since the first FPGA was released by Xilinx in 1985, FPGAs have become denser and more powerful. The first FPGA that operates in the microwave range was designed in 2000. Various methods, such as a new basic cell structure and multimode routing, are used to make that design faster and less power consuming. Sequential logic functions are analyzed and tested in this paper with a DEMUX implementation using these high-speed FPGA circuits. A chip measurement has shown that the FPGA can operate at a 12-GHz system clock when configured to perform sequential logic. A DEMUX that operates at 12 Gb/s is used here to demonstrate the potential for high-performance and low-power FPGA features.
Keywords :
Ge-Si alloys; demultiplexing equipment; field programmable gate arrays; high-speed integrated circuits; DEMUX implementation; SiGe - Interface; SiGe high-speed FPGA circuits; Xilinx; bit rate 7 Gbit/s to 12 Gbit/s; demultiplexer; field-programmable gate array; frequency 12 GHz; sequential logic function; Circuit testing; Clocks; Field programmable gate arrays; Germanium silicon alloys; Logic functions; Logic testing; Routing; Semiconductor device measurement; Sequential analysis; Silicon germanium; Current mode logic (CML); field-programmable gate arrays (FPGAs); programmable logic arrays; silicon germanium;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2007.902208
Filename :
4292163
Link To Document :
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