BiCMOS current steering pipeline circuit technique

The authors provide a new circuit technique for pipelined high fan-in nFET trees; the circuit is based on a current mode sense and latch arrangement. The technique uses the bipolar devices present in a BiCMOS technology as both a sensitive current detector, and a low impedance driver. The logic functionality is realised by embedding complex nMOS transistor trees inside nFET latches, and connecting slave TSPC pFET latches. The resulting configuration provides spatially and functionally dense implementations which are resistant to clock skew and charge sharing