Abstract :
A fundamental problem in "cellular logic" is to be able to "synthesize" "cellular arrays" for arbitrary switching functions that minimize a set of design parameters like size of the arrays and complexity of the individual cells and of the interconnection pattern on the cells. This paper is an attempt to develop "minimization algorithms for cellular arrays."
Keywords :
Cellular logic, minimization algorithms for cellular arrays, synthesis of cellular arrays, unate cellular arrays.; Bibliographies; Computer errors; Concurrent computing; Large scale integration; Logic arrays; Logic design; Manufacturing; Minimization methods; Reliability engineering; Testing; Cellular logic, minimization algorithms for cellular arrays, synthesis of cellular arrays, unate cellular arrays.;
