DocumentCode :
1101945
Title :
A BiCMOS time interval digitizer based on fully-differential, current-steering circuits
Author :
Loinaz, Marc J. ; Wooley, Bruce A.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Volume :
29
Issue :
6
fYear :
1994
fDate :
6/1/1994 12:00:00 AM
Firstpage :
707
Lastpage :
714
Abstract :
A time interval digitizer cell with a 0-16 ns input range and a nominal LSB width of 1.0 ns has been integrated in a 2-μm BiCMOS technology, The circuit exhibits both integral and differential nonlinearity below 0.15 LSB and a timing error of 0.32 ns RMS. Logic gate propagation delays are used as time measurement units, and the nominal value of the delays is set by an on-chip phase-locked loop (PLL). Fully-differential, current-steering circuits with low voltage swings are used to implement the time interval digitizer so as to generate minimal switching noise. The cell is to be used in the monolithic, multi-channel realization of a high-sensitivity, mixed-signal data acquisition front-end. By virtue of the time digitization architecture used, the average power dissipation of the cell is only 19.8 mW, despite the use of circuits that dissipate static power, and the layout area is a compact 448 μm×634 μm
Keywords :
BiCMOS integrated circuits; analogue-digital conversion; data acquisition; phase-locked loops; time measurement; 0 to 16 ns; 19.8 mW; 2 mum; 2-μm BiCMOS technology; 448 mum; 634 mum; BiCMOS time interval digitizer; average power dissipation; current-steering circuits; differential nonlinearity; fully-differential; high-sensitivity; input range; integral nonlinearity; layout area; logic gate propagation delays; low voltage swings; minimal switching noise; mixed-signal data acquisition front-end; multi-channel realization; nominal LSB width; on-chip phase-locked loop; static power; time digitization architecture; time interval digitizer cell; time measurement units; timing error; BiCMOS integrated circuits; Delay effects; Integrated circuit technology; Logic gates; Low voltage; Phase locked loops; Propagation delay; Switching circuits; Time measurement; Timing;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.293117
Filename :
293117
Link To Document :
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