• DocumentCode
    1102374
  • Title

    Optimizing graph algorithms for improved cache performance

  • Author

    Park, Joon-Sang ; Penner, Michael ; Prasanna, Viktor K.

  • Author_Institution
    Comput. Sci. Dept., California Univ., Los Angeles, CA, USA
  • Volume
    15
  • Issue
    9
  • fYear
    2004
  • Firstpage
    769
  • Lastpage
    782
  • Abstract
    We develop algorithmic optimizations to improve the cache performance of four fundamental graph algorithms. We present a cache-oblivious implementation of the Floyd-Warshall algorithm for the fundamental graph problem of all-pairs shortest paths by relaxing some dependencies in the iterative version. We show that this implementation achieves the lower bound on processor-memory traffic of Ω(N3/√C), where N and C are the problem size and cache size, respectively. Experimental results show that this cache-oblivious implementation shows more than six times the improvement in real execution time over that of the iterative implementation with the usual row major data layout, on three state-of-the-art architectures. Second, we address Dijkstra´s algorithm for the single-source shortest paths problem and Prim´s algorithm for minimum spanning tree problem. For these algorithms, we demonstrate up to two times the improvement in real execution time by using a simple cache-friendly graph representation, namely adjacency arrays. Finally, we address the matching algorithm for bipartite graphs. We show performance improvements of two to three times in real execution time by using the technique of making the algorithm initially work on subproblems to generate a suboptimal solution and, then, solving the whole problem using the suboptimal solution as a starting point. Experimental results are shown for the Pentium III, UltraSPARC III, Alpha 21264, and MIPS R12000 machines.
  • Keywords
    cache storage; computational complexity; iterative methods; optimisation; parallel processing; trees (mathematics); Alpha 21264; Dijkstra algorithm; Floyd-Warshall algorithm; MIPS R12000 machines; Pentium III; Prim algorithm; UltraSPARC III; adjacency arrays; bipartite graphs; cache performance; cache-friendly graph representation; cache-oblivious algorithm; data layout optimizations; graph algorithm optimizations; graph matching; minimum spanning tree problem; processor-memory traffic; shortest paths problem; Application software; Bipartite graph; Clustering algorithms; Computer networks; Helium; Iterative algorithms; Routing protocols; Shortest path problem; Signal processing algorithms; Tree graphs; 65; Cache-friendly algorithms; algorithm performance.; cache-oblivious algorithms; data layout optimizations; graph algorithms; graph matching; minimum spanning trees; shortest path;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2004.44
  • Filename
    1333649