• DocumentCode
    1102478
  • Title

    MOS Integrated circuits fabricated on multilayer heteroepitaxial silicon-insulator structures for applications to 3-D integrated circuits

  • Author

    Sugiura, Souichi ; Yoshida, Tohru ; Kaneko, Yawara ; Shono, Katsufusa ; Dumin, David J.

  • Author_Institution
    Toshiba Corporation, Kawasaki, Japan
  • Volume
    32
  • Issue
    11
  • fYear
    1985
  • fDate
    11/1/1985 12:00:00 AM
  • Firstpage
    2307
  • Lastpage
    2313
  • Abstract
    Multiple layers of single-crystal silicon and boron phosphide have been grown on silicon and silicon-on-sapphire substrates. Up to four layers have been grown on silicon and two layers on silicon-on-sapphire. The quality of the silicon layers was confirmed by fabricating PMOS integrated circuits on the top silicon layer in all of these structures. The integrated circuits contained individual transistors, p-n diodes, inverters, flip-flops, and ring oscillators. All circuits successfully operated on all of the layers tested. The transistor mobilities tended to drop as more layers were added to the structure. The delay time of the ring oscillators rose as the number of layers increased reflecting the drop in transistor mobilities. By fabricating circuits on the various layers, the quality of the individual layers has been shown to be sufficiently high to consider this material combination as a possible candidate for 3-D integrated circuits. The boron phosphide was used not only as an insulator but also for the fabrication of vertical resistors and p-n junctions.
  • Keywords
    Boron; Circuit testing; Diodes; Inverters; MOS integrated circuits; Nonhomogeneous media; Ring oscillators; Silicon; Substrates; Three-dimensional integrated circuits;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1985.22275
  • Filename
    1485021