Fundamentals of memory switching in vertical polycrystalline silicon structures

The fundamentals of memory switching in vertical LPCVD polysilicon structures have been investigated. In the initial state, 4-70 µm²devices exhibit effective resistances (at 5 V) in the high megaohm range, with current transport via thermionic emission of electrons over grain boundary potential barriers. An increase in conductance by approximately five orders of magnitude is achieved by a 10-20 V programming pulse of tens of microseconds duration with a few milliamps of current required. A moderately doped filamentary region is created, exhibiting single-crystal silicon transport phenomena. With regard to practical device fabrication, control of thin film interactions is critical. Barrier layers are employed to suppress Al-Si interaction at the top contact and to decrease the effective grain size of the polysilicon film by limiting the epitaxial realignment of the grains near the single-crystal substrate.