Title :
The ILLIAC IV Processing Element
Author :
Davis, Robert L.
Author_Institution :
IEEE
Abstract :
This paper describes the design of the processing element (PE) of I IV, a parallel processing computer consisting of 256 PE´s, each with an associated 2048 word memory. Each PE-memory combination with its data-dependent controls is a computer in itself, devoid of those controls common to all PE-memory combinations, such as instruction decoding, instruction look-ahead, etc.
Keywords :
Computer arithmetic, ILLIAC IV, medium-scale integration, parallel processing.; Broadcasting; Clocks; Computer aided instruction; Decoding; Digital arithmetic; Logic; Parallel processing; Process design; Registers; Routing; Computer arithmetic, ILLIAC IV, medium-scale integration, parallel processing.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1969.222777
