Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET´s using a gate-overlapped LDD structure

Author

Yamaguchi, Yasuo ; Iwamatsu, Toshiaki ; Joachim, Hans-Oliver ; Oda, Hidekazu ; Inoue, Yasuo ; Nishimura, Tadashi ; Tsukamoto, Katsuhiro

Author_Institution

Soc. of Appl. Phys., Japan

Volume

41

Issue

7

fYear

1994

fDate

7/1/1994 12:00:00 AM

Firstpage

1222

Lastpage

1226

Abstract

A gate-overlapped LDD structure was introduced to ultra-thin SOI MOSFET´s in order to overcome the degradation in source-to-drain breakdown voltage (BVds) due to a parasitic bipolar action. By reductions in drain electric field and parasitic resistance at a source n^- region, the BVds was improved with almost the same current drivability as that in single drain structure. The behavior of the BVds on LDD n^- concentration was investigated by use of a numerical device simulator, and it was found that the electric field at a lower portion of the n^- region, which forms the current path, was relaxed effectively at an optimum n^- doping condition

Keywords

doping profiles; impact ionisation; insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; silicon; current drivability; current path; drain electric field; gate-overlapped LDD structure; numerical device simulator; optimum doping condition; parasitic bipolar action; source-to-drain breakdown voltage; ultrathin-film SOI MOSFETs; Breakdown voltage; Charge carrier processes; Degradation; Doping; Equations; Immune system; Impact ionization; Impurities; MOSFET circuits; Numerical simulation;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.293351

Filename

293351