Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET´s using a gate-overlapped LDD structure

A gate-overlapped LDD structure was introduced to ultra-thin SOI MOSFET´s in order to overcome the degradation in source-to-drain breakdown voltage (BVds) due to a parasitic bipolar action. By reductions in drain electric field and parasitic resistance at a source n^- region, the BVds was improved with almost the same current drivability as that in single drain structure. The behavior of the BVds on LDD n^- concentration was investigated by use of a numerical device simulator, and it was found that the electric field at a lower portion of the n^- region, which forms the current path, was relaxed effectively at an optimum n^- doping condition