• DocumentCode
    1104213
  • Title

    Some CMOS device constraints at low temperatures

  • Author

    Tzou, J.J. ; Yao, C.C. ; Cheung, R. ; Chan, H.

  • Author_Institution
    Advanced Micro Devices, Inc., Sunnyvale, CA
  • Volume
    6
  • Issue
    1
  • fYear
    1985
  • fDate
    1/1/1985 12:00:00 AM
  • Firstpage
    33
  • Lastpage
    35
  • Abstract
    Two of the CMOS device constraints at low temperatures have been identified, namely, the transconductance and the breakdown voltage roll-off. In the short channel devices, the transconductance first increases then decreases with the decreasing temperature. This transconductance roll-off phenomenon is likely caused by the parasitic series resistance in the source and drain regions. The breakdown voltage of the MOSFET´s due to the parasitic bipolar transistor action decreases with the decreasing temperature, which is caused by the increase of the impact ionization rate at low temperatures.
  • Keywords
    Bipolar transistors; CMOS technology; Doping; Electron mobility; Intrusion detection; MOSFET circuits; Scattering; Temperature dependence; Temperature measurement; Transconductance;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/EDL.1985.26033
  • Filename
    1485186