Trapezoidal-groove Schottky-gate vertical-channel GaAs FET (GaAs static induction transistor)

This letter reports, the development of a vertical-channel. GaAs FET with the unsaturated characteristics of the static induction transistor (SIT) and voltage blocking capability up to 100 V. The device structure utilizes the anisotropic etching properties of GaAs, in which the gate regions are formed by a double-angle evaporation into trapezoidal etched grooves. This single evaporation step simultaneously provides both source and gate metallization, and the novel trapezoidal groove geometry automatically yields a self-aligned gate with separation of source and gate onto different levels, thus eliminating the need for critical alignment arising from source-gate interdigitation.