DocumentCode :
1105606
Title :
A Novel Low-Temperature Polysilicon Thin-Film Transistors With a Self-Aligned Gate and Raised Source/Drain Formed by the Damascene Process
Author :
Chang, Kow Ming ; Lin, Gin Min ; Yang, Guo Liang
Author_Institution :
Nat. Chiao Tung Univ., Hsinchu
Volume :
28
Issue :
9
fYear :
2007
Firstpage :
806
Lastpage :
808
Abstract :
In this letter, a novel structure of the polycrystalline silicon thin-film transistors (TFTs) with a self-aligned gate and raised source/drain (RSD) formed by the damascene process has been developed and investigated. Comparing with the conventional coplanar TFT, the proposed RSD TFT has a remarkable lower off-state current (177 to 6.29 nA), and the on/off current ratio is only slightly decreased from 1.71 times 107 to 1.39 times 107. Only four photomasking steps are required. This novel structure is an excellent candidate for further high-performance large-area device applications.
Keywords :
masks; polymer films; semiconductor thin films; thin film transistors; Si - Interface; coplanar TFT; damascene process; low-temperature polycrystalline silicon thin-film transistors; photomasking; raised source-drain; self-aligned gate; Amorphous materials; Chemical vapor deposition; Electric resistance; Etching; Fabrication; Grain boundaries; Leakage current; Region 2; Silicon; Thin film transistors; Damascene process; four masks; on/off current ratio; polycrystalline silicon thin-film transistor (poly-Si TFT); raised source/drain (RSD); self-aligned gate; thin channel;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2007.903313
Filename :
4294049
Link To Document :
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