• DocumentCode
    1105664
  • Title

    An approach for multilevel logic optimization targeting low power

  • Author

    Iman, Sasan ; Pedram, Massoud

  • Author_Institution
    Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
  • Volume
    15
  • Issue
    8
  • fYear
    1996
  • fDate
    8/1/1996 12:00:00 AM
  • Firstpage
    889
  • Lastpage
    901
  • Abstract
    This paper shows that using don´t cares computed for area optimization during local node minimization may result in an increase in the power consumption of other nodes in a Boolean network. It then presents techniques for computing a subset of observability and satisfiability don´t care conditions that can be used freely to optimize the local function of nodes. The concept of minimal variable support is then used to optimize the local function of each node for minimum power using its power relevant don´t care set, that is, to reimplement the local function using a modified support that has a lower switching activity. Empirical results on a set of benchmark circuits are presented and discussed
  • Keywords
    Boolean functions; VLSI; circuit optimisation; integrated circuit design; logic CAD; multivalued logic circuits; Boolean network; area optimization; benchmark circuits; don´t care conditions; local node minimization; minimal variable support; multilevel logic optimization; observability; power relevant don´t care set; satisfiability; switching activity; Boolean functions; Circuit synthesis; Computer networks; Energy consumption; Logic circuits; Minimization; Network synthesis; Observability; Switching circuits; Throughput;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.511569
  • Filename
    511569