Abstract :
This paper presents a method of performing the binary multiplication beyond the scheme of multiple ADD and SHIFT. The binary multiplication algorithm will be discussed first, followed by block decoding method, logic implementation, hardware consideration, and two examples which are at the end of the discussion.
Keywords :
Block decoding technique, fast multiplication, high-speed computer logic, high-speed multiplication, parallel multiplication.; Concurrent computing; Decoding; Equations; Hardware; High performance computing; Logic; Transfer functions; Block decoding technique, fast multiplication, high-speed computer logic, high-speed multiplication, parallel multiplication.;
