Adder With Distributed Control

An adder is described for addition of a large number of binary numbers xj, j=1, 2, ⋯, m, where xj=∑ixji⋅ 2ⁱ, xji=0, 1, i=0, 1, ⋯, n-1. The adder´s algorithm has two parts: 1) the bits xjiare added independently for each binary order i:si=∑jxji≦m and the result expressed in the binary form si=∑kaik, ⋅ 2^k, aik=0, 1, k=0, 1,⋯, p-1 (where 2^p-1≦m<2^p); 2) the sum y=∑jxjis formed by adding terms sik·^2i+kas contributions of the bit sikto the total y. A hardware implementation of this algorithm is suggested where the sum s; is obtained by a sequential circuit which reorders the values xjiso that their sum si, remains unchanged and so that after the reordering the new values xjiⁱobey the conditions xj+1,i≦xjifor every j=1, 2,⋯, m-1. The implementation with integrated circuits should be quite rewarding because the control of the circuit is done with independent control elements distributed all over the chip.