Arithmetic ternary operations on delta-modulated signals and their application in the realization of digital filters

This correspondence shows a method for determining the ternary delta sequence of the third of the sum of two analog signals through their corresponding delta sequences. The hardware implementation proposed here is modular employing a universal logic T-gate which allows building both sequential and combinatorial circuits. The primary advantage of a ternary nonredundant symmetric presentation of the TDM over a binary DM presentation is the reduction of problems of carry propagation in arithemetic operation and reduction in connections and interconnections between chips and interchips.