DocumentCode
1106581
Title
Realization of n-channel and p-channel high-mobility (Al,GA)As/GaAs heterostructure insulating gate FET´s on a planar wafer surface
Author
Cirillo, N.C., Jr. ; Shur, M.S. ; Vold, P.J. ; Abrokwah, J.K. ; Tufte, O.N.
Author_Institution
Honeywell Inc., Bloomington, MN
Volume
6
Issue
12
fYear
1985
fDate
12/1/1985 12:00:00 AM
Firstpage
645
Lastpage
647
Abstract
Self-aligned gate by ion implantation n-channel and p-channel high-mobility (Al,Ga)As/GaAs heterostructure insulated-gate field-effect transistors (HIGFET´s) have been fabricated on the same planar wafer surface for the first time. Enhancement-mode n-channel (Al,Ga)As/GaAs HIGFET´s have demonstrated extrinsic transconductances of 218 mS/mm at room temperature and 385 mS/mm at 77 K. Enhancement-mode p-channel (Al,Ga)As/GaAs HIGFET´s have demonstrated extrinsic transconductances of 28 mS/mm at room temperature and 59 mS/mm at 77 K. There are the highest transconductance values ever reported on a p-channel FET device.
Keywords
FETs; Gallium arsenide; Insulation; Ion implantation; Logic circuits; Logic devices; Power dissipation; Switching circuits; Temperature; Transconductance;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1985.26261
Filename
1485414
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