Title :
TSV Replacement and Shield Insertion for TSV–TSV Coupling Reduction in 3-D Global Placement
Author :
Serafy, Caleb ; Srivastava, Ankur
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
Abstract :
Through silicon via (TSV) cross coupling can seriously degrade circuit performance of 3-D ICs if it is not considered during design. In this paper, we propose two algorithms which combine coupling-aware TSV placement with shield insertion to yield better results than either technique alone. We first introduce an algorithm for TSV placement assuming a fixed standard cell placement. The result of this algorithm is a 13% reduction in worst case coupling across all TSV pairs and a 90% reduction in the total number of TSV pairs violating an imposed coupling threshold. We then introduce a second algorithm that perturbs a given standard cell and TSV placement to improve coupling. This second algorithm yields a 17% reduction in worst case coupling and removes all coupling violations. Both algorithms cause wirelength (WL) to increase no more than 5%. Our algorithms offer a large improvement to TSV-TSV coupling at the expense of only a meager degradation of total WL, and in many designs and applications this trade-off is well justified.
Keywords :
coupled circuits; three-dimensional integrated circuits; wires (electric); 3D IC; 3D global placement; TSV replacement; TSV-TSV coupling reduction; circuit performance; coupling aware TSV placement; shield insertion; standard cell placement; through silicon via; wirelength; Couplings; Equations; Force; Mathematical model; Standards; Three-dimensional displays; Through-silicon vias; 3-D placement; 3D Placement; Coupling Aware; Force-Driven Placement; TSV Coupling; TSV Placement; TSV Shielding; TSV placement; TSV shielding; coupling aware; force-driven placement; through silicon via (TSV) coupling;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2014.2385754