DocumentCode
1107217
Title
The Organization and Use of Parallel Memories
Author
Budnik, Paul ; Kuck, David J
Author_Institution
IEEE
Issue
12
fYear
1971
Firstpage
1566
Lastpage
1569
Abstract
As computer CPUs get faster, primary memories tend to be organized in parallel banks. The fastest machines now being developed can fetch of the order of 100 words in parallel. Unless memory and compiler designers are careful, serious memory conflicts and resulting performance degradation may result. Some of the important questions of design and use of such memories are discussed.
Keywords
Memory conflicts, parallel computer, parallel memory, pipeline computer, skewed array storage.; Computer science; Concurrent computing; Data structures; Degradation; Hardware; Pipelines; Memory conflicts, parallel computer, parallel memory, pipeline computer, skewed array storage.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1971.223171
Filename
1671764
Link To Document