• DocumentCode
    1107426
  • Title

    A comparison between BIMOS device types

  • Author

    Adler, Michael S.

  • Author_Institution
    General Electric Corporate Research and Development, Schenectady, NY
  • Volume
    33
  • Issue
    2
  • fYear
    1986
  • fDate
    2/1/1986 12:00:00 AM
  • Firstpage
    286
  • Lastpage
    293
  • Abstract
    This paper deals with the design and comparison of three types of BIMOS transistors (cascade, cascode, and parallel combinations of MOSFET and bipolar transistors). The first section of the paper presents a technique for accurately determining the overall device I-V relations for the cascade (Darlington) combination based on the area ratio for the MOSFET and bipolar transistors. From this, one sees that the optimum area ratio varies from 1.5 for 700-V devices to 0.2 for 80- V devices. The second section of the paper deals with the design and comparison of the cascode and parallel device types. In these cases, no optimum area ratio based solely on device conduction exists and the device design and comparison is based on achieving the maximum current density limited by keeping the power dissipation to under 100 W/ cm2. Included in this analysis are losses due to conduction as well as switching. The results show that a 0.5 area ratio (MOSFET to bipolar transistor) is optimum for the cascode (series) combination and a 0.3 ratio is a good compromise for the parallel combination. The last section of the paper shows an overall comparison of all of the BIMOS device types together with the MOSFET and the bipolar transistor.
  • Keywords
    Bipolar transistors; Costs; Driver circuits; MOS devices; MOSFET circuits; Performance gain; Power MOSFET; Power dissipation; Semiconductor optical amplifiers; Switches;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1986.22480
  • Filename
    1485697