Title : 
On the Delay Required to Realize Boolean Functions
         
        
            Author : 
Preparata, Franco P. ; Muller, David E.
         
        
            Author_Institution : 
IEEE
         
        
        
        
            fDate : 
4/1/1971 12:00:00 AM
         
        
        
        
            Abstract : 
Using as logic modules two-input one-output arbitrary logic gates, this note considers the problem of the longest chain (number of levels) in a tree-type interconnection realizing a Boolean function of n variables. Specifically, we are interested in the minimum number of levels L(n) by which we can constructively realize all Boolean functions of n variables. It was previously shown that L(n)≤n for n=3, 4 and it was so conjectured for n= 5; in this note we are able to show that this holds for n=5, 6, 7, 8.
         
        
            Keywords : 
Computational complexity, conjuctive decomposition, realization delay, switching functions.; Boolean functions; Computer networks; Contracts; Delay effects; Joining processes; Logic gates; Mathematics; Network synthesis; Upper bound; Computational complexity, conjuctive decomposition, realization delay, switching functions.;
         
        
        
            Journal_Title : 
Computers, IEEE Transactions on
         
        
        
        
        
            DOI : 
10.1109/T-C.1971.223266