Asynchronous Arbiters

Author

Plummer, William W.

Author_Institution

Bolt Beranek & Newman, Inc.

Issue

1

fYear

1972

Firstpage

37

Lastpage

42

Abstract

When two or more processors attempt to simultaneously use a functional unit (memory, multiplier, etc.), an arbiter module must be employed to insure that processor requests are honored in sequence. The design of asynchronous arbiters is complicated because multiple input changes are allowed, and because inputs may change even if the circuit is not in a stable state. A practical arbiter and its implementation are presented. Implementation of various priority rules (linear, ring, mixed) is discussed, and building large arbiters with trees of two-user arbiters is considered.

Keywords

Asynchronous arbiter, asynchronous logic design, conflict resolution, functional unit allocation, hardware resource allocation, macromodules, modular control logic, multiprocessor computer system, priority network, sequential machines with multiple input changes.; Buildings; Circuits; Computer networks; Control systems; Delay; Displays; Hardware; Logic design; Resource management; Wire; Asynchronous arbiter, asynchronous logic design, conflict resolution, functional unit allocation, hardware resource allocation, macromodules, modular control logic, multiprocessor computer system, priority network, sequential machines with multiple input changes.;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/T-C.1972.223429

Filename

1672022