Title :
Reconfigurable hardware SAT solvers: a survey of systems
Author :
Skliarova, Iouliia ; de Brito Ferrari, A.
Author_Institution :
Dept. of Electron. & Telecommun., Aveiro Univ., Portugal
Abstract :
By adapting to computations that are not so well-supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational systems use high-capacity programmable logic devices and are based on processing units customized to the requirements of a particular application. A great deal of the research effort in this area is aimed at accelerating the solution of combinatorial optimization problems. Special attention in this context was given to the Boolean satisfiability (SAT) problem resulting in a considerable number of different architectures being proposed. This paper presents the state-of-the-art in reconfigurable hardware SAT satisfiers. The analysis and classification of existing systems has been performed according to such criteria as algorithmic issues, reconfiguration modes, the execution model, the programming model, logic capacity, and performance.
Keywords :
Boolean functions; computability; field programmable gate arrays; optimisation; reconfigurable architectures; Boolean satisfiability problem; SAT solvers; combinatorial optimization problems; field programmable gate arrays; general-purpose processors; programmable logic devices; reconfigurable hardware; Acceleration; Application software; Circuit testing; Concurrent computing; Field programmable gate arrays; Hardware; Logic programming; Logic testing; Performance analysis; Reconfigurable logic; 65; FPGA; Index Terms- Boolean satisfiability; hardware acceleration.; reconfigurable computing;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.2004.102