• DocumentCode
    1110641
  • Title

    Polymorphic-torus network

  • Author

    Li, Hungwen ; Maresca, Massimo

  • Author_Institution
    IBM Almaden Res. Center, San Jose, CA, USA
  • Volume
    38
  • Issue
    9
  • fYear
    1989
  • fDate
    9/1/1989 12:00:00 AM
  • Firstpage
    1345
  • Lastpage
    1351
  • Abstract
    An interconnection network is presented for a massively parallel fine-grained single-instruction, multiple-data (SIMD) system, called the polymorphic-torus, whose design goal is to provide high communication bandwidth under a packaging constraint. This goal is achieved by the polymorphic principle, which injects switches with circuit-switching capability into every node of a base network (e.g. a two-dimensional torus). The polymorphic approach maintains wiring complexity of the base network but effectively increases the communication bandwidth due to its flexibility in reconfiguring the switches individually and dynamically to match the algorithm graph. Formal analysis on interpackage wiring (the flux) and the intrapackage wiring (the fluid) is given for the polymorphic-torus and the related torus networks. Three algorithms, namely, the Boolean, the max/min, and the sum operations, are developed to illustrate the use of the polymorphic principle in enhancing the communication bandwidth with no penalty of the interpackage wiring complexity
  • Keywords
    multiprocessor interconnection networks; Boolean; SIMD; circuit-switching capability; communication bandwidth; interconnection network; interpackage wiring; max/min; parallel fine-grained; polymorphic-torus network; sum operations; wiring complexity; Adders; Bit rate; Clocks; Counting circuits; Delay; Input variables; Logic arrays; Pipeline processing; Registers; Research and development;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.29479
  • Filename
    29479