Title :
A Design Procedure for Fault-Locatable Switching Circuits
Author :
Reddy, Sudhakar M.
Author_Institution :
Department of Electrical Engineering, University of Iowa
Abstract :
A technique to design fault-locatable combinational switching circuits is given. The networks resulting from the application of the proposed technique have at most three levels of gates.
Keywords :
Fault-locatable designs, fault location, stuck-at faults, unate functions.; Circuit faults; Cities and towns; Digital systems; Electrical fault detection; Fault detection; Fault location; Logic; Switching circuits; Fault-locatable designs, fault location, stuck-at faults, unate functions.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1972.223517
