Abstract :
A high-speed, self-checking count circuit realization is attainable by using combinational logic and parity prediction. The utilization of combinational logic as opposed to sequential logic design generally minimizes the amount of software necessary for routine and diagnostic testing. Count circuits with parity prediction find application in stand-alone, self-checking processors.
Keywords :
Binary counter, error detection, integrated circuits, parallel counter, parity generation, parity prediction, self-checking logic.; Application software; Circuit faults; Circuit testing; Combinational circuits; Counting circuits; Electrical fault detection; Fault detection; Hardware; Logic design; Logic testing; Binary counter, error detection, integrated circuits, parallel counter, parity generation, parity prediction, self-checking logic.;
