Abstract :
A deductive method of fault simulation is described, which "deduces" the faults defected by a test at the same time that it simulates explicitly only the good behavior of logic circuit. For large logic circuits (at least several thousand gates) it is expected to be faster than "parallel" fault simulators, but uses much more computer memory than do parallel simulators.
Keywords :
Deductive method, error symptoms, fault dictionary, fault simulation, logic circuits, simulation, trouble location.; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Concurrent computing; Electrical fault detection; Fault detection; Logic circuits; Logic testing; Deductive method, error symptoms, fault dictionary, fault simulation, logic circuits, simulation, trouble location.;
