DocumentCode
1111558
Title
A DI/JI-compatible monolithic high-voltage multiplexer
Author
Williams, Richard K. ; Sevilla, Larry T. ; Ruetz, Eric ; Plummer, James D.
Author_Institution
Siliconix Incorporated, Santa Clara, CA
Volume
33
Issue
12
fYear
1986
fDate
12/1/1986 12:00:00 AM
Firstpage
1977
Lastpage
1984
Abstract
A high-voltage multiplexer fabricated with both junction-isolated (
) and dielectrically isolated (
) D/CMOS process technologies is described in this paper. This eight-channel multiplexer is capable of switching a ± 50-V analog-signal range from a ± 60-V power supply. The switches exhibit less than 50 Ω of on-resistance and are capable of peak currents in excess of 0.5 A. An off-switch current model incorporating junction area and lifetime-dependent lateral DMOS drain-to-body and drain-to-substrate leakages is described. Elimination of the drain-to-substrate diode with dielectric isolation results in a factor of 15 reduction in leakage at 25°C and a factor of 10 improvement at 125°C, which agrees well with the model developed. Results show that the generation current from the space-charge region dominates device leakage at room temperature, while diffusion current from the neutral regions is predominant at elevated temperatures. In high-voltage testers, dielectrically isolated multiplexers offer the low leakage and high accuracy required by critical channels where less costly junction-isolated devices will not suffice.
) and dielectrically isolated (
) D/CMOS process technologies is described in this paper. This eight-channel multiplexer is capable of switching a ± 50-V analog-signal range from a ± 60-V power supply. The switches exhibit less than 50 Ω of on-resistance and are capable of peak currents in excess of 0.5 A. An off-switch current model incorporating junction area and lifetime-dependent lateral DMOS drain-to-body and drain-to-substrate leakages is described. Elimination of the drain-to-substrate diode with dielectric isolation results in a factor of 15 reduction in leakage at 25°C and a factor of 10 improvement at 125°C, which agrees well with the model developed. Results show that the generation current from the space-charge region dominates device leakage at room temperature, while diffusion current from the neutral regions is predominant at elevated temperatures. In high-voltage testers, dielectrically isolated multiplexers offer the low leakage and high accuracy required by critical channels where less costly junction-isolated devices will not suffice.Keywords
CMOS process; CMOS technology; Dielectrics; Diodes; Isolation technology; Multiplexing; Power supplies; Semiconductor device modeling; Switches; Temperature;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1986.22856
Filename
1486073
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