DocumentCode :
1111820
Title :
Hot-carrier-induced degradation in p-channel LDD MOSFET´s
Author :
Tzou, Joseph J. ; Yao, C.C. ; Cheung, R. ; Chan, Hugo W K
Author_Institution :
Advanced Micro Devices, Inc., Sunnyvale, CA
Volume :
7
Issue :
1
fYear :
1986
fDate :
1/1/1986 12:00:00 AM
Firstpage :
5
Lastpage :
7
Abstract :
When the p-channel MOSFET is stressed near the maximum substrate current Isub , the lifetime t (5-percent increase in the transconductance) follows 
, with n = 2.0. A simple electron trapping model is proposed to explain the observed power law relationship. The current ratio 
and the maximum channel electric field decrease with increasing stress time, which is consistent with electron trapping in the oxide during the stress.
, with n = 2.0. A simple electron trapping model is proposed to explain the observed power law relationship. The current ratio and the maximum channel electric field decrease with increasing stress time, which is consistent with electron trapping in the oxide during the stress.Keywords :
CMOS technology; Charge carrier processes; Degradation; Electron traps; Hot carriers; MOSFET circuits; Marine vehicles; Stress; Threshold voltage; Transconductance;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1986.26273
Filename :
1486096
Link To Document :
