DocumentCode
1111898
Title
A 64K SRAM with high immunity from heavy ion induced latch-up
Author
Shiono, Noboru ; Sakagawa, Yoshimitsu ; Matsumoto, Tadashi ; Akasaka, Yoichi
Author_Institution
NTT Atsugi Electrical Communication Laboratories, Kanagawa, Japan
Volume
7
Issue
1
fYear
1986
fDate
1/1/1986 12:00:00 AM
Firstpage
20
Lastpage
22
Abstract
A 64-kbit SRAM with high latch-up immunity has been developed with the application of a well-source structure combined with an epi-substrate. Heavy-ion beam exposure tests reveal that the device has high immunity from cosmic-ray induced latch-up, and the soft-error cross section is about 8.6 × 10-7cm2/(bit particle) for 73-MeV Ar ions.
Keywords
Argon; CMOS technology; Equivalent circuits; Ion beams; Laboratories; Random access memory; Read-write memory; Space technology; Substrates; Testing;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1986.26278
Filename
1486101
Link To Document