• DocumentCode
    1111963
  • Title

    Use of zone-melting recrystallization to fabricate a three-dimensional structure incorporating power bipolar and field-effect transistors

  • Author

    Geis, M.W. ; Chen, C.K. ; Mountain, R.W. ; Economou, Nicholas P. ; Lindley, W.T. ; Hower, Philp L.

  • Author_Institution
    Massachusetts Institute of Technology, Lexington, MA
  • Volume
    7
  • Issue
    1
  • fYear
    1986
  • fDate
    1/1/1986 12:00:00 AM
  • Firstpage
    41
  • Lastpage
    43
  • Abstract
    Three-dimensional (3-D) structures have been fabricated incorporating power bipolar transistors in a Si substrate and metal-oxide-semiconductor field-effect transistors (MOSFET´s) in an overlying silicon-on-insulator (SOI) film that was zone-melting recrystallized with a graphite strip heater. Both N-P-N and P-N-P bipolar transistors were used. The N-P-N devices exhibited no significant change in transistor characteristics after zone-melting recrystallization (ZMR), while the P-N-P devices showed a substantial reduction in breakdown voltage. The MOSFET´s exhibited electron mobilities comparable to those in similar devices fabricated in single-crystal Si wafers. The bipolar transistor yield is approximately 90 percent. The unusually high device quality and yield for 3-D structures obtained by the ZMR technique demonstrates the feasibility of fabricating monolithic structures incorporating both logic functions and relatively high-current high-voltage power switches.
  • Keywords
    Bipolar transistors; FETs; Laboratories; Logic devices; Logic functions; MOSFET circuits; Power MOSFET; Semiconductor films; Substrates; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/EDL.1986.26285
  • Filename
    1486108