Multiplier-free IIR filter realization using periodically time-varying state-space structure. I. Structure and design

Author

Ghanekar, Sachin ; Tantaratana, Sawasd ; Franks, Lewis E.

Author_Institution

Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA

Volume

42

Issue

5

fYear

1994

fDate

5/1/1994 12:00:00 AM

Firstpage

1008

Lastpage

1017

Abstract

A multiplier-free realization for IIR filters is proposed. A given target IIR filter is implemented in cascade or parallel form of biquad units. Each biquad unit is realized with a periodically time-varying (PTV) state-space system. The system uses a higher order PTV state-space (PTV-SS) structure operating at an elevated signal rate to realize each biquad. The coefficients of the PTV-SS structure used in the realization are restricted to a few power-of-two values. Therefore, such a structure can be implemented without any hardware multiplier. A brief analysis of precision and round-off error for the realization is presented. Examples show that the frequency response of the proposed realization matches very well with that of the target filter

Keywords

digital filters; frequency response; network synthesis; state-space methods; time-varying networks; biquad units; coefficients; frequency response; multiplier-free IIR filter; periodically time-varying state-space structure; precision; round-off error; signal rate; Digital filters; Finite impulse response filter; Frequency response; Hardware; IIR filters; Matched filters; Roundoff errors; Time varying systems; Transfer functions; Very large scale integration;

fLanguage

English

Journal_Title

Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1053-587X

Type

jour

DOI

10.1109/78.295216

Filename

295216