DocumentCode :
1113411
Title :
On Modifying Logic Networks to Improve Their Diagnosability
Author :
Hayes, John P.
Author_Institution :
Department of Electrical Engineering and Computer Science Program, University of Southern California
Issue :
1
fYear :
1974
Firstpage :
56
Lastpage :
62
Abstract :
This paper considers the use of control logic to reduce the number of tests required by a logic network and to simplify test generation. The properties of EXCLUSIVE-OR (EOR) circuits as control elements are examined. Systematic procedures are presented for modifying any combinational or sequential network so that the resulting network requires only five tests. These tests can easily be generated using a set of predefined test patterns of length five. The design of diagnosable networks using a limited amount of control logic is also discussed.
Keywords :
Control logic, diagnosable logic networks, fault diagnosis, improving diagnosability, test reduction.; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Logic design; Logic testing; Observability; Sequential analysis; System testing; Test pattern generators; Control logic, diagnosable logic networks, fault diagnosis, improving diagnosability, test reduction.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1974.223777
Filename :
1672370
Link To Document :
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