DocumentCode
1113984
Title
An Example Computer Logic Graph and Its Partitions and Mappings
Author
Mennone, Angelo ; Russo, Roy L.
Author_Institution
IBM Thomas J. Watson Research Center
Issue
11
fYear
1974
Firstpage
1198
Lastpage
1204
Abstract
The purpose of this correspondence is to provide an example computer logic graph and data concerning various partitions and mappings of this graph. This information should be of particular interest to those workers who are developing partitioning and mapping algorithms, since it provides a means to test and compare alternative methods. It should also be of use to those interested in other algorithms (e.g., placement, diagramming, grouping, etc.) for logic graphs.
Keywords
Computer-aided design, computer-based design, computer logic graph, design automation, heuristic algorithm, logic mapping, logic partitioning, logic segmentation, mapping algorithm, partitioning algorithm, segmentation algorithm.; Algorithm design and analysis; Conductors; Containers; Design automation; Feedback loop; Heuristic algorithms; Logic design; Logic testing; Partitioning algorithms; Pins; Computer-aided design, computer-based design, computer logic graph, design automation, heuristic algorithm, logic mapping, logic partitioning, logic segmentation, mapping algorithm, partitioning algorithm, segmentation algorithm.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1974.223830
Filename
1672423
Link To Document