Title :
Stress-induced double-hump substrate current in MOSFET´s
Author :
Huang, Tiao-Yuan ; Szeto, Clement ; Chen, John Y. ; Lewis, Alan G. ; Martin, Russel A. ; Shaw, John ; Koyanagi, Mitsumasa
Author_Institution :
Xerox Palo Alto Research Center, Palo Alto, CA
fDate :
12/1/1986 12:00:00 AM
Abstract :
Asymmetries in substrate current characteristics due to hot-electron stressing have been observed in short-channel n-MOSFET´s. Due to the localized nature of trapped charges or interface traps as a result of hot-electron stressing, transistors can show single-peak or double-hump substrate current characteristics under normal- or reverse-mode measurements. Two-dimensional simulations indicate that a high lateral electric field is generated near the source when the negative charges are trapped there. This electric field is responsible for the observed double-hump substrate current and enhanced gate current injection under reverse-mode measurements for the stressed transistors.
Keywords :
Annealing; Avalanche breakdown; Breakdown voltage; Circuit testing; Current measurement; Electric variables measurement; Electron traps; Implants; MOSFET circuits; Stress measurement;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1986.26512