DocumentCode
1114464
Title
A Performance Trade-Off for the Insulated Gate Bipolar Transistor: Buffer Layer Versus Base Lifetime Reduction
Author
Hefner, Allen R., Jr. ; Blackburn, David L.
Author_Institution
Semiconductor Electronics Division, National Bureau of Standards, Gaitherburg, MD 20899.
Issue
3
fYear
1987
fDate
7/1/1987 12:00:00 AM
Firstpage
194
Lastpage
207
Abstract
A one-dimensional analytic model for the insulated gate bipolar transistor (IGBT), which includes a high-doped buffer layer in the low-doped bipolar transistor base, is developed. The model is used to perform a theoretical trade-off study between IGBT´s with and without the buffer layer. The study is performed for devices of equal breakdown voltages, and the critical parameters chosen to ``trade-off´´ are turn-off switching energy loss (related to turn-off time) and on-state voltage, both at a given current. In this model, as in reality, the two critical parameters are varied by 1) adjusting the doping concentration and thickness of a buffer layer included as part of the bipolar transistor base, 2) adjusting the lifetime in the lowly doped bipolar transistor base with no buffer layer included, or by 3) a combination of 1) and 2). The results of the model predict that for equal breakdown voltages an optimized device with a buffer layer has less switching energy loss for a given on-state voltage than an optimized device with no buffer layer.
Keywords
Bipolar transistors; Breakdown voltage; Buffer layers; Epitaxial layers; Equivalent circuits; Insulated gate bipolar transistors; Insulation; MOSFET circuits; Power MOSFET; Substrates;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.1987.4766360
Filename
4766360
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