Title :
A low-temperature NMOS technology with Cesium-implanted load devices
Author :
Watt, Jeffrey T. ; Fishbein, Bruce J. ; Plummer, James D.
Author_Institution :
Stanford University, Stanford, CA
fDate :
1/1/1987 12:00:00 AM
Abstract :
A 2-µm enhancement/depletion-type NMOS technology designed for operation at liquid-nitrogen temperature is described. A cesium oxide implant has been used to realize load devices that are not degraded by the freeze out of mobile carriers that occurs in the bulk of conventional depletion-mode transistors at low temperature, Unloaded ring oscillators, fabricated using this technology, have an average propagation delay of 360 ps/stage and a power dissipation of 190 µW/stage with a 2.5-V power supply at 77 K; this represents an improvement in speed of a factor of 2.5 over a conventional NMOS technology operating at room temperature. Simulations predict a further decrease in delay to 200 ps/stage for a 2-/µm process may be achieved through optimization of the Cs-implanted load device without compromising noise margins.
Keywords :
Circuit testing; Conductivity; Degradation; Implants; MOS devices; Propagation delay; Ring oscillators; Surface resistance; Temperature; Threshold voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1987.22882