DocumentCode :
1114956
Title :
Data Manipulating Functions in Parallel Processors and Their Implementations
Author :
Feng, Tse-yun
Author_Institution :
Department of Electrical and Computer Engineering, Syracuse University
Issue :
3
fYear :
1974
fDate :
3/1/1974 12:00:00 AM
Firstpage :
309
Lastpage :
318
Abstract :
This paper shows that there exists a class of functions called data manipulating functions (DMF´s), in sequential as well as paralel processors. The circuits used to achieve these functions can be considered to form an independent functional block, called a data manipulator. A basic organization applicable to both sequential and parallel processors is then suggested. The main deviation of a parallel processor orgaization from the conventional Von Neumann organization is seen to be in the bit-slice (bis) manipulating functions. A comprehensive set of bis manipulating functions from the categories of permuting, replicating, spacing and masking is given. Implementation of the last category, the masking functions, is usually through a mask register by defining its content (mask pattern). It is found that for many operations the required mask patterns are periodic and/or monotonic. The upper bounds of generating these patterns are found. The techniques and designs of two data manipulators for the first three categories of DMF´s (permuting, replicating, spacing) are given. Periodic and monotonic mask patterns are also used to help in implementing some of these functions. In addition, it is shown that the data manipulator designs presented in this paper are extremely flexible to suit the requirements of various parallel processors.
Keywords :
Cell communications, data manipulating functions, data manipulator, logic design, parallel processing, parallel processor organization, processing characteristics.; Application software; Arithmetic; Circuits; Communication switching; Logic design; Parallel processing; Registers; Throughput; Upper bound; Cell communications, data manipulating functions, data manipulator, logic design, parallel processing, parallel processor organization, processing characteristics.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1974.223927
Filename :
1672520
Link To Document :
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