Title : 
Optimal routing of two rectangular blocks
         
        
            Author : 
Chandrasekhar, Mandalagiri S. ; Breuer, Melvin A.
         
        
            Author_Institution : 
Univ., of Southern California, Los Angeles, CA, USA
         
        
        
        
        
            fDate : 
4/1/1989 12:00:00 AM
         
        
        
        
            Abstract : 
The problem in LSI/VLSI layout design of routing nets interconnecting two rectangular blocks is considered. Properties that determine horizontal-track (H-track) sharing between nets are identified. It is shown that H-track sharing can essentially be treated as pad-position-independent. For any case of colinearity constraints and interaction between nets in certain edge sets, the number of H-tracks required for routing is at most one more than for the case in which there are no such constraints. A share-graph model that models the H-track sharing between edge sets is developed. H-track sharing between nets in edge sets whose direction of routing is uniquely determined is first considered. Then nets that have alternate paths but use the same number of H-tracks are added to the north and south share-graphs. Algorithms to operate on these share-graphs to provide optimal H-track sharing are developed. The vertical track (V-track) sharing problem is considered as a matching problem in which a net routed to the south of the minimum enclosing rectangle must be matched to a net routed to the north
         
        
            Keywords : 
VLSI; circuit layout; graph theory; large scale integration; network topology; optimisation; LSI; VLSI; colinearity constraints; horizontal track sharing; layout design; matching problem; optimal routeing; pad-position-independent; rectangular blocks; routing nets; share-graph model; vertical track sharing; Helium; Integrated circuit interconnections; Integrated circuit layout; Large scale integration; Minimization; Optimal matching; Research and development; Routing; Silicon; Very large scale integration;
         
        
        
            Journal_Title : 
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on