Cycling endurance of NOR flash EEPROM cells under CHISEL programming operation - impact of technological parameters and scaling

Author

Nair, Deleep R. ; Shukuri, S. ; Mahapatra, S.

Author_Institution

Dept. of Electr. Eng., Indian Inst. of Technol. Mumbai, India

Volume

51

Issue

10

fYear

2004

Firstpage

1672

Lastpage

1678

Abstract

The impact of technological parameter (channel doping, source/drain junction depth) variation and channel length scaling on the reliability of NOR flash EEPROM cells under channel initiated secondary electron (CHISEL) programming is studied. The best technology for CHISEL operation has been identified by using a number of performance metrics (cycling endurance of program/erase time, program/disturb margin) and scaling studies were done on this technology. It is explicitly shown that from a reliability perspective, bitcell optimization for CHISEL operation is quite different from that for channel hot electron (CHE) operation. Properly optimized bitcells show reliable CHISEL programming for floating gate length down to 0.2 μm.

Keywords

NOR circuits; flash memories; hot carriers; integrated circuit design; integrated circuit reliability; integrated circuit testing; integrated memory circuits; logic design; 0.2 micron; CHE operation; CHISEL operation; CHISEL programming operation; NOR flash EEPROM cells; band-to-band tunneling; bitcell optimization; channel doping; channel hot electron; channel initiated secondary electron; channel length scaling; cycling endurance; device scaling; drain disturb; drain junction depth; flash EEPROMs; floating gate length; hot carriers; optimized bitcells; reliability; reliable CHISEL programming; source junction depth; technological parameter; variation length scaling; Channel hot electron injection; Degradation; Doping; EPROM; Hot carriers; Impact ionization; Measurement; Negative feedback; Substrate hot electron injection; Tunneling; Band-to-band tunneling; CHE; CHISEL; Flash EEPROMs; channel hot electron; channel initiated secondary electron; device scaling; drain disturb; hot carriers;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2004.835996

Filename

1337180