• DocumentCode
    1115619
  • Title

    HPSAC—A silicided amorphous-silicon contact and interconnect technology for VLSI

  • Author

    Wong, S. Simon ; Chen, Devereaux C. ; Merchant, Paul ; Cass, Thomas R. ; Amano, Jun ; Chiu, Kuang Y.

  • Author_Institution
    Cornell University, Ithaca, NY
  • Volume
    34
  • Issue
    3
  • fYear
    1987
  • fDate
    3/1/1987 12:00:00 AM
  • Firstpage
    587
  • Lastpage
    592
  • Abstract
    A high-performance silicided amorphous-silicon contact and interconnect technology (HPSAC) for VLSI is presented. In this novel scheme, a patterned silicide layer is used to form self-aligned contacts to the source/drain regions, as well as to interconnect devices. The fabrication procedures and some key processing techniques are described, Experimental results on n-and p-channel MOSFET´s fabricated with HPSAC technology are presented. The performance improvement due to reduction of parasitic capacitance and resistance is discussed.
  • Keywords
    Contact resistance; Dielectric devices; Etching; Fabrication; Integrated circuit interconnections; Integrated circuit technology; MOSFET circuits; Parasitic capacitance; Silicides; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1987.22967
  • Filename
    1486678