A Formalism for Description and Synthesis of Logical Algorithms and their Hardware Implementation

The design methodology developed in the paper is based on an APL-like definition of logical arrays and operations on such arrays. First, the notion of a logical algorithm is introduced as a finite state automaton described by transition and output matrix. The technical realizations of such algorithms is then uniformly described as time-discrete, space-discrete, and time-space-discrete systems, and the transition of an algorithm from state-to-state (or space node-to-space node) can be explicitly formulated in a very concise way. An application of this formalism to the state reduction problem is shown. Thus the paper extends the APL-based design of logical networks beyond the area of combinational networks as developed first by Iverson.