An Algebraic Method for Designing Multivalued Logic Circuits using Principally Binary Components

Algebraic reduction procedures for multivalued logic functions based upon a principally binary circuit realization are presented. The procedures given are also applicable to literal gate realizations employing compound literals. The prime implicant generation and covering problems are treated in detail. It is shown that the selected cover must be iteratively examined for possible reduction at each decision point of the covering process. This reduction is achieved by the elimination of unnecessary nonadjacencies.