DocumentCode
1117759
Title
Arithmetic Networks and Their Minimization Using a New Line of Elementary Units
Author
Meo, Angelo R.
Author_Institution
Politecnico of Torino and Istituto Elettrotecnico Nazionale G. Ferraris
Issue
3
fYear
1975
fDate
3/1/1975 12:00:00 AM
Firstpage
258
Lastpage
280
Abstract
A family of switching networks, called "arithmetic networks," is investigated. The elementary units of these networks are generalizations of full adders that can process input signals of different weights.
Keywords
Arithmetic networks, lead system characteristic sequence (LSCS), network characteristic sequence (NCS), open, quasi-open, and closed system, operations σ, γ, μ, σ; Adders; Arithmetic; Computational efficiency; Costs; Counting circuits; Digital systems; Network synthesis; Signal processing; Signal synthesis; Stability analysis; Arithmetic networks, lead system characteristic sequence (LSCS), network characteristic sequence (NCS), open, quasi-open, and closed system, operations σ, γ, μ, σ;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1975.224207
Filename
1672800
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