Pseudocollector effect in a CMOS inverter

The pseudocollector effect in a CMOS inverter is demonstrated by analyzing the current distribution in the latchup state. The decoupling of the current flow from the latchup feedback loop is controlled by the input voltage applied to the gates of n- and p-channel MOSFET´s, which results in a reduction of latchup susceptibility. Latchup in a CMOS inverter is influenced by the input voltage through pseudocollector and potential modulation effects. A simple SCR structure cannot reflect adequately these phenomena.