DocumentCode :
1118255
Title :
Orthogonal Latin Square Configuration for LSI Memory Yield and Reliability Enhancement
Author :
Hsiao, Mu Y. ; Bossen, Douglas C.
Author_Institution :
IBM Corporation
Issue :
5
fYear :
1975
fDate :
5/1/1975 12:00:00 AM
Firstpage :
512
Lastpage :
516
Abstract :
When errors occur which exceed the correction capability of an error correcting code, the only recourse to restore the original memory function is to physically replace the failed entity. In this paper the authors propose an automatic reconfiguration technique which uses the concept of address skewing to disperse such multiple errors into correctable errors. No additional redundancy other than that required for the error correcting code is needed. The skewing mechanism is derived using the theory of orthogonal Latin squares.
Keywords :
Error correction, fault-tolerant large-scale integrated (LSI) memory, Latin square.; Costs; Error correction; Error correction codes; FETs; Fault tolerance; Helium; Large scale integration; Random access memory; Redundancy; Semiconductor memory; Error correction, fault-tolerant large-scale integrated (LSI) memory, Latin square.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1975.224254
Filename :
1672847
Link To Document :
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