DocumentCode
1118289
Title
An advanced high-performance trench-isolated self-aligned bipolar technology
Author
Li, G.P. ; Ning, Tak H. ; Chuang, C.T. ; Ketchen, Mark B. ; Tang, Denny Duan-Lee ; Mauer, John
Author_Institution
IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Volume
34
Issue
11
fYear
1987
fDate
11/1/1987 12:00:00 AM
Firstpage
2246
Lastpage
2254
Abstract
This paper describes the extension of "double-poly" self-aligned bipolar technology to include a silicon-filled trench with self-aligned cap oxide isolation, a p{^+} polysilicon defined epi-base lateral p-n-p, a p{^+} polysilicon defined self-aligned guard-ring Schottky-barrier diode, and p{^+} polysilicon resistors. Experimental circuits designed with 1.2-µm design rules have shown switching delays of as small as 73 ps for ECL circuits with FI = FO = 1. ISL circuits built with the same process on the same chip as the ECL circuits exhibit a sub-400-ps switching delay. The performance of the technology has also been demonstrated by a 5-kbit ECL SRAM with a 760-µm2Schottky-clamped multi-emitter cell and 1.0-ns access time.
Keywords
Boron; Delay; Etching; Isolation technology; Paper technology; Random access memory; Resistors; Schottky diodes; Switching circuits; Transistors;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1987.23227
Filename
1486938
Link To Document